Integrated circuits are chemically and physically integrated into a substrate, such as a silicon wafer, by patterning regions in the substrate and by patterning layers on the substrate. These regions and layers can be conductive, for conductor and resistor fabrication. They can also be of different conductivity types, which is essential for transistor and diode fabrication.
Deposited conductors are an integral part of every integrated circuit, and provide the role of wiring for conductive current. Specifically, the deposited conductors are used to wire together the various components that are formed on and in the surface of the wafer. Such conductors, also referred to as "lines" or "runners", are typically provided at different elevations within the wafer structure. At some locations, it may become necessary to make electrical contact between higher and lower elevation conductive lines on the wafer. This invention concerns a problem associated with making electrical contact between two different elevation conductive layers, where the lower elevation layer includes aluminum.
Aluminum is a common material used for the metal conductive runner layers due in large part to the ease with which it can be worked, and due to its high conductivity. Most commonly, the aluminum materials utilized for conductive runners are alloys of aluminum comprising, for example, 1% silicon and 0.5% copper, with the remaining fraction being essentially elemental aluminum. The resistivity of such a material is only 3 microohms-cm, thereby providing excellent conductivity.
However, one drawback is that aluminum and its alloys readily form aluminum oxide (Al.sub.2 O.sub.3) when subjected to an oxidizing atmosphere, such as air. Al.sub.2 O.sub.3 is a highly insulative material having a resistivity of 3.5.times.10.sup.14 microohms-cm. The spontaneous formation of Al.sub.2 O.sub.3 can cause problems in metallization procedures which are described with reference to FIGS. 1-3.
FIG. 1 diagrammatically illustrates a cross-section of a portion of a semiconductor wafer fragment 10 having an insulating dielectric portion 12 and overlying aluminum metal layer 14. A second layer of dielectric material 16 has been applied and patterned to form a contact opening 18. During application of dielectric 16, or subsequent thereto, wafer fragment 10 is exposed to an oxidizing atmosphere which transforms the upper surface of the aluminum layer 14 through contact opening 18 into the highly electrically insulative Al.sub.2 O.sub.3, as represented by numeral 20. The Al.sub.2 O.sub.3 region 20 which grows on top of layer 14 might consume perhaps about 100 Angstroms of the thickness of layer 14, as compared to a typical thickness of aluminum layer 14 of about 10,000 angstroms. The relative thickness of region 20 in the figures compared to the thickness of layer 14 is exaggerated for clarity of viewing region 20.
Where the wafer is exposed to an oxidizing atmosphere before or during application of dielectric layer 16, the Al.sub.2 O.sub.3 region would typically form entirely across the upper surface of aluminum layer 14. This would not create a significant problem throughout the runner as only the upper 30 to 40 Angstroms of this 10,000 Angstrom thick metal layer would be transformed into an insulating material. There is still ample material for conveying current along the runner.
However, the Al.sub.2 O.sub.3 of region 20 within contact opening 18 produces an insulative barrier to electrical contact between metal layer 14 (sometimes referred to as Metal 1) and a subsequently applied conductive layer (sometimes referred to as Metal 2). FIG. 2 illustrates a second metal layer 22 applied atop dielectric 16 which fills contact opening 18. Insulating Al.sub.2 O.sub.3 region 20 prevents the desired electrical contact between Metal 2 layer 22 and Metal 1 layer 14. Such would result in a failed circuit.
In an effort to alleviate the above described problem, the present state of the art typically conducts a radio frequency (RF) induced plasma etch in a non-oxidizing atmosphere before application of second metal layer 22 in an effort to completely remove Al.sub.2 O.sub.3 region 20 from contact opening 18. Such adds another time consuming step to the overall process, and is not 100% reliable. For example, the RF etch may not be effective in removing any of Al.sub.2 O.sub.3 region 20, or may only remove a fraction thereof. Such is insufficient to enable an acceptable conductive contact to be made between Metal 2 layer 22 and Metal 1 layer 14. FIG. 3 illustrates an Al.sub.2 O.sub.3 region 20a which was reduced in size from the FIGS. 1 and 2 region 20 by an RF etch, but yet not sufficiently to be completely removed thereby still leaving a resistive barrier between metal two layer 22 and aluminum metal layer 14.
It would be desirable to overcome these and other drawbacks associated with electrical contact resistance which occurs between an underlying aluminum layer and an overlying conductive layer making contact thereto.